The present invention relates generally to a method of estimating the phase of an electrical signal and more specifically to estimating the phase of a pilot tone or sinusoid embedded in a wideband digital signal modulating a radio frequency (RF) carrier signal.
One conventional way of estimating the phase of a pilot signal or tone embedded in a wideband digital signal modulating a radio frequency (RF) carrier signal is to bandpass filter the signal around the pilot tone, down convert the RF signal to baseband and then perform phase tracking. Since the RF signal is data-bearing, the bandpass filter needs to have a very narrow bandwidth to extract the pilot signal. Constructing such a narrow bandpass filter in the digital domain requires implementing a filter with a large number of taps requiring repetitive multiply and add operations that proves to be computationally expensive. Computationally expensive is a term in the digital and the software arts for processes that require a substantial amount of time to perform. The performance of electronic devices decrease as a result of these slow computational processes.
An example of a system using a digitally modulated RF signal with a pilot tone is the new Digital Television Standard developed by the Advanced Television Systems Committee (ATSC) and adopted by the Federal Communications Commission. The Digital Television Standard is designed to transmit high quality video, audio and ancillary data over a 6 MHz channel. The Standard describes the channel coding and modulation RF/transmission subsystems for terrestrial and cable applications. The modulation subsystem uses a digital data stream to modulate the transmitted signal and may be implemented in two modes: a terrestrial broadcast mode (8-VSB) delivering about 19 Mbps, and a higher data rate mode (16-VSB) delivering about 38 Mbps for cable television systems where higher signal to noise is ensured.
The modulation technique implemented in the Digital Television Standard was developed by Zenith Electronics Corp. and employs vestigial sideband modulation. The overall system response of the transmitter and receiver filtering corresponds to a raised cosine filter to avoid system generated intersymbol interference. The system response is implemented with serially coupled, nominally identical root raised cosine filters in the transmitter and in the receiver.
The incoming digital data stream is randomized, forward-error-correction (FEC) encoded and interleaved. The randomized, FEC coded and interleaved data is trellis encoded as an 8-level (3-bit) one dimensional constellation. The outputs of the trellis coder are mapped into symbols that are one of eight symmetric odd-valued integer levels from xe2x88x927 to +7 units. To aid synchronization in low signal to noise and/or high multipath situations, segment and field syncs are inserted in the 10.76 Msymbols/sec symbol stream. A small pilot tone is added as well at the carrier frequency generated by offsetting the real or I channel of the complex baseband signal containing the data and the sync pulses by 1.25 units. The offset causes the pilot tone to be in-phase with the I channel signal component. At the transmitter, the composite signal passes through a root raised cosine filter and modulates an intermediate frequency carrier signal which is up-converted to an RF frequency for transmission at the desired channel frequency. Alternately, the composite signal may be used to directly modulate the RF carrier.
Referring to FIG. 1, there is shown a representative block diagram of a VSB receiver for extracting the digital television signal data from the digitally modulated RF signal as described in the xe2x80x9cGuide to the Use of the ATSC Digital Television Standardxe2x80x9d published by the ATSC. The receiver 10 receives the UHF or VHF signal through a band-pass filter and broadband tracking filter 12. A wideband amplifier 14 increases the signal and couples it to a first mixer 16. The mixer is driven by a 1st local oscillator 18 that tunes over a range from 978 to 1723 MHz. The 1st local oscillator 18 is synthesized by a phase locked-loop and controlled by a microprocessor (not shown). The output of the mixer 16 is an up-converted intermediate frequency (IF) signal at 920 MHz. The IF signal is coupled to an LC filter 20 in tandem with a band-pass ceramic resonator filter 22 centered at 921 MHz. An IF amplifier 24 is placed between the two filters. The IF signal is coupled to a second mixer 26 that is driven by 2nd local oscillator 28. The 2nd local oscillator 28 is an 876 MHZ voltage controlled SAW oscillator controlled by a frequency and phase-locked loop (FPLL) synchronous detector 30. The output of the second mixer 26 is centered at 45 MHz. This IF signal that drives a constant gain 44 MHZ amplifier 32. The output of the amplifier 32 is coupled to an IF SAW filter 34. The IF SAW filter 34 implements an approximation of the transmission system""s root raised cosine filter at the receiver. The output of the SAW filter 34 is coupled to the FPLL synchronous detection circuitry 30 via an AGC controlled amplifier 36.
Carrier recovery is performed on the pilot signal by the FPLL synchronous detector circuit 30. The operation of this circuit is described in U.S. Pat. No. 4,091,410, assigned to Zenith Electronics Corp. The configuration provides a Phase locked Loop (PLL) function with a very wide pull-in range which insures rapid carrier acquisition. The I-channel composite baseband data signal from the FPLL synchronous detector 30 is coupled through a low pass filter 54 to an analog-to-digital converter (AID) 56 that is clocked by a properly phased 10.76 MHZ symbol clock 58. The digital data from the A/D converter 56 is coupled to a data segment sync (DSS) detector 60 having a narrow bandwidth filter for detecting from the synchronously detected random data the repetitive data segment syncs as described in U.S. Pat. No. 5,416,524, assigned to Zenith Electronics Corp. A control voltage error signal from the data segment sync detector 60 locks the symbol clock to the incoming data clock frequency.
What is needed is a method for estimating the phase of a pilot signal or tone equivalent to a carrier in a digitally modulated signal where the pilot signal is contaminated by the digital data and unrelated phase noise. Preferably, the phase estimation method should be performed on an intermediate frequency carrier of a complex digitally modulated RF signal containing a pilot signal at the IF frequency. The phase estimation method needs to implement a computationally efficient narrow pass filter on the pilot signal at the IF frequency that filters the digital modulation data. The phase estimation method further needs to efficiently compute the phase between the intermediate frequency signal and the sampling signal over a block of the signal samples.
Accordingly, an object of the present invention is a method of estimating the phase of a pilot signal or tone embedded in a wideband signal modulating a RF signal that implements a computationally efficient narrow pass filter for removing the digital modulation data from a digitized intermediate frequency signal.
Another object of the present invention is a method of estimating the phase of a pilot signal or tone embedded in a wideband digital signal modulating a RF signal that efficiently estimates the phase of the pilot tone over a block of the signal samples.
The method of estimating the phase of a pilot signal or tone is implemented in a digital acquisition system that generates an intermediate frequency (IF) signal with the pilot tone frequency being set at an IF frequency having a relationship to the sampling frequency as fIF=fs/M where M takes an integer value equal to or greater than 2. In the preferred embodiment of the present invention, the IF frequency has a M=4 times relationship with the reference sampling frequency (i.e. the IF signal is sampled at four times the pilot tone/IF frequency). The phase estimation method includes the steps of summing a block of the signal samples for removing the modulation data and generating data values representative of the phase angle of the pilot signal. The method also includes the step of calculating the phase of the pilot signal with respect to the reference signal by determining the arc tangent of the data values. The reference signal is a cosine wave having a phase of 0xc2x0 at the first sample instance and whose phase progresses linearly through 360xc2x0 of phase angle over every cycle of N sample points. The calculating step also includes the additional step of determining sine and cosine values of the pilot signal phase using the data values.
When the digitally modulated IF signal is sampled at four times the pilot frequency, the summing step further includes the step of generating two data values representing of cosine values of the angular rotation of the pilot signal vector and two data values representing sine values of the angular rotation of the pilot signal vector. The two data values representing the cosine values are one-hundred and eighty degrees apart from each other and the two data values representing the sine values are one-hundred and eighty degrees apart from each other. The respective cosine and sine data values are averaged by summing the negative of one of the cosine values with the other cosine value to generate a data point representing the cosine value of the angular rotation of the pilot vector and the negative of one of the sine values with the other sine value to generate a data point representing the sine value of the angular rotation of the pilot vector.
The intermediate frequency carrier and pilot signal may drift in phase over time generating a variable phase between the pilot signal and the reference signal that is compensated for by the additional steps of decimating the block of signal samples by summing sub-blocks within the block of signal samples for removing the modulation data and generating data values representative of vector locations of the pilot signal with each of the data values representing an angular rotation of the pilot signal vector within the sub-blocks with each sub-block being offset from the previous sub-block by a decimation factor. The pilot phase is calculated with respect to the reference signal by determining the arc tangent of the data values within the sub-blocks. The pilot signal phases of the sub-blocks are further filtered with a filter having sufficient bandwidth for tracking phase drift. An additional step of interpolating between the calculated pilot signal phases of the sub-blocks may be employed for generating additional pilot signal phases.
The objects, advantages and novel features of the present invention are apparent from the following detailed description when read in conjunction with the appended claims and attached drawings.